This invention is related to computer memory systems of a type utilizing small, compact semiconductor memory cards, and particularly to a structure within the cards for densely packing a large number of integrated circuit chips of electrically erasable and programmable read-only-memory (xe2x80x9cEEPROMxe2x80x9d) to provide a complete memory system.
Currently, standard microcomputer systems use a combination of fixed and removable (floppy) magnetic disk media for long-term, non-volatile memory. Semiconductor random access memory (xe2x80x9cRAMxe2x80x9d) without a battery power supply backup is only temporarily used since it is volatile; that is, when power to the computer system is disconnected, contents of the RAM are lost. A small amount of read only memory (xe2x80x9cROMxe2x80x9d) is also included for permanent storage of certain computer system parameters that do not change.
There is currently underway an effort to develop non-volatile flash EEPROM memory systems to replace either of the existing fixed or floppy magnetic disk systems, or both. It is now becoming possible to form a megabyte or more of flash EEPROM on a single semiconductor integrated circuit chip. As a result, several megabytes of memory can be formed in a very small package.
Indeed, an industry xe2x80x9cPC Card Standardxe2x80x9d, release 1.0, dated August 1990, of the Personal Computer Memory Card International Association (PCMCIA) sets mechanical and electrical interface standards for a memory card that is not much larger than an ordinary credit card. Although some physical dimension variations are permitted within the scope of this standard, it is less than 6.0 mm in overall outside thickness, less than 5.5 cm in width, and less than 9.0 cm in length. A female type of pin connector is provided across one of the narrow ends of the card structure. Such PC cards have been commercially implemented primarily with static random-access-memory (xe2x80x9cSRAMxe2x80x9d) and ROM.
It is a principal object of the present invention to provide a structure for packaging a large number of flash EEPROM integrated circuit chips within such a PC card or other standard structure, thereby providing a large memory capacity in an individual card or other industry standard physical configuration.
It is another object of the present invention to provide a complete flash EEPROM system within such an individual card or other standard configuration that emulates a floppy or hard disk system.
It is a further object of the present invention to provide such a PC card structure that is easy to fabricate and test during assembly.
It is yet another object of the present invention to provide an improved computer memory system that utilizes one or more PC cards containing EEPROM integrated circuit chips.
This and additional objects are accomplished by the various aspects of the present invention, wherein, briefly and generally, according to one aspect, one or more EEPROM memory chips are directly mounted to a substrate to form a sub-board structure, and one or more of the sub-board structures are then attached to both sides of a main circuit board that extends through-out an interior of the card package and terminates along one side to form the PC card connector. Each of the sub-boards has a line of electrical terminals along one side thereof in a pattern that matches a pattern of exposed conductors on the main board.
In specific implementations, two, three or four such memory chips are provided in a row along a rectangularly shaped sub-board having terminals along one of its long dimensions and which is attached to the main board through connection of its terminals with the exposed main board contacts. Several such sub-boards can be installed on the main board, on one or both sides, within the limits of the PC card standard identified above. This sub-board structure permits a large number of EEPROM chips to be included within such a card. It also allows testing of the chips attached to each sub-board before they are assembled together on the main board, thus allowing an early identification of any problems in the mounting and initial interconnection of the circuit chips.
One type of EEPROM PC card contains only EEPROM memory chips, with the use of sub-boards as discussed above or otherwise, which are then interconnected through the card socket to a controller circuit. The controller interfaces between a computer system""s main bus and the individual circuit chips. One, two or more sockets may be provided in conjunction with a given controller for respectively removably receiving one, two or more PC cards at a time. An amount of permanent EEPROM capacity may optionally be serviced by the same controller circuit.
Another type of flash EEPROM PC card contains a large number of individual memory circuit chips, either in the sub-board structure described above or otherwise, plus one or more circuit chips forming a controller. In this embodiment, each PC card communicates through its connector in a format of a computer system bus. Such a PC card is self-contained and no intervening controller circuit is required.
According to another aspect of the present invention, a f lash EEPROM system is provided with physical form factors which match those of industry standard floppy and hard disk drives, along with an electrical interface that emulates such drives. Such a non-volatile flash EEPROM system is then easily usable as an alternative in a computer system designed to include such disk drives.
According to yet another aspect of the present invention, a flash EEPROM system is provided in a PC card or other industry standard memory system package with a controller for directly interfacing the system with a computer system bus. No extra adaptation is required to use such a non-volatile, non-mechanical mass memory in computer systems whose hardware and software operating systems are designed to accept and use disk systems. The internal controller converts the computer bus interface and signal protocols to those required to operate the flash EEPROM memory.
Additional objects, features and advantages of the various aspects of the present invention will become apparent from the following description of its preferred embodiments, which description should be taken in conjunction with the accompanying drawings.